This invention relates to the field of computer circuitry which microinstructions are stored in a control store unit.
In the modern microprocessor, it is common to use a wide control store memory, for example, such as that having a 1024 words where each word has over 200 bits control data. The control store memory normally holds and carries control store words to control various components inside the microprocessor. In general, the control store words can be addressed by a sequence of control store access addresses where each of the control store access addresses corresponds to the relevant control store word.
Conventionally, there are two methods of detecting defect(s) in the control store memory. The first method is to perform a built-in-self-test ("BIST") on the control store memory. The second method is to log each control store word out of the microprocessor so that each stored control store word can be verified. These two methods can be performed simultaneously, or sequentially, during the start-up of the microprocessor. In some cases, only one of these two mechanisms is employed in a microprocessor to detect any defects in the control store memory.
To perform the BIST on the control store memory, a BIST mechanism is provided in the microprocessor for generating a sequential control store address beginning from the first address of the control store memory and incrementing through the entire control store memory so that a BIST testing procedure can be performed on each control store word.
Similarly, a logout mechanism generates a sequence of sequential control store addresses so that each control store data can be read out bit-by-bit from the control store memory. Each bit of every control store word is then output from the microprocessor through a single pin so that all the control store data stored in the control store memory can be read out and compared with known patterns.
It should be mentioned that in some microprocessor designs, another form of memory logout is also implemented. Specifically, the microprocessor is provided with a memory address through a scan-in/scan-out pin located in the mircroprocessor. After a memory address is scanned in the microprocessor, the corresponding memory data is then scanned out from the specific memory bit-by-bit during each clock cycle using the scan-in/scan-out pin. Thus, any specific memory location within the microprocessor can be retrieved and compared off-chip.
Conventionally, the logout process can be performed using the same BIST mechanism because both processes require an address generator for generating a sequential control store address. For example, both the BIST and logout mechanism comprises an address generator for generating a sequence of control store addresses from the first address to the last address of the control store memory.
In the conventional designs, thus, dedicated hardware is needed to perform this BIST, or logging out function. And in most cases, the address generator for this dedicated BIST design cannot run at full CPU speed because of timing constraints. This handicap of not able to perform the BIST testing on the control store memory and/or logging out the control store memory at full speed creates problems of failing to detect some control store memory errors that only occur when the control store memory is under stress (i.e. running under full CPU speed).
Therefore, it is desirable to have a control store BIST and/or logout mechanism which can perform the logout at full CPU speed while being able to maintain a simple design without adding additional hardware to the control store design.